A processor main memory may comprise two levels of memory, including a faster access first level smaller memory, such as a Dynamic Random Access Memory (DRAM) system, that caches data for a second level larger and slower memory. The second level memory is presented to the host and operating system as the main memory while the first level memory functions as the cache and is transparent to the operating system. The management of the two level memory (2LM) may be performed by a 2LM engine in the processor of the host.